B.Tech student focused on digital design, FPGA implementation, Verilog HDL, embedded systems, and introductory machine learning.
Mental Health Society, Thapar Institute of Engineering & Technology
Coordinated awareness initiatives and student engagement activities; demonstrated leadership, communication, and peer-support skills.
B.Tech, Electronics & Communication Engineering
Expected graduation: 2028
Relevant coursework: Digital Electronics, Signals & Systems, C Programming, Data Structures (Basics).
Implemented an AND-gated JK master-slave flip-flop with asynchronous preset and clear based on IC 74x72. Developed behavioral and structural Verilog models, verified them using testbenches, and synthesized and tested the design on FPGA hardware with pin-compatible implementation.
Implemented half adder, full adder, ripple-carry adder, multiplexers, ALU, and shift registers. Designed behavioral and structural models with corresponding testbenches and verified functionality through simulation and waveform analysis.
Built a customer segmentation model using unsupervised learning techniques; performed data preprocessing and clustering to derive meaningful insights.
Developed an image-based crack detection system for classification; applied preprocessing and model evaluation for surface crack identification.